Jobs / Blu***

SLD Avionics FPGA Engineer III - Lunar Permanence

Blu*** · Seattle, WA, United States
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Seattle, WA, United States119,814-182,988 USD/yearlyOnsite
Remuneration
119,814-182,988 USD/yearly
Location
Seattle, WA, United States
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Job summary

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blu***, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion.

Benefits

At Blue Origin, we envision millions of people living and working in space for tStock Options for all regular employees (working at least 20 hours/week)Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, anDependent on role type and job level, employees may be eligible forBonus amounts and eligibility are not guaranteed and subject to change and cancePlease check with your recruiter for more details.Equal Employment OpportunityBlue Origin hires and promotes people on the basis of their

Qualifications

  • in coordination with systems engineering, hardware engineering, software engineering and subsystem owners.
  • You will develop FPGA design and verification utilizing hardware description languages.
  • You will be responsible for the development of tests and the associated documentation.
  • You will participate in design reviews.
  • You will work directly with NASA and our National Team Partners as part of the Human Landing System (HLS) Sustaining Lunar Development (SLD) program.
  • You will play a key role in developing the Lunar Transportation system that will return humans to the Moon and extend human presence permanently beyond the bounds of Earth.
  • We are looking for someone to apply their technical expertise, leadership
  • Bachelor's/Master’s degree in computer engineering, electrical engineering, computer science, mathematics, physics, aerospace, or related fields.
  • 5+ years of FPGA/ASIC design and verification work experience.
  • Proficient in writing RTL using Verilog/SystemVerilog/VHDL (SystemVerilog desired).
  • Strong understanding of FPGA design concepts, CDC, constraint definition, STA, and timing closure.
  • Proficient with FPGA development

Responsibilities

  • You will be instrumental in developing firmware

Skills

Commercial Driver's LicenseLeadershipTeamwork

Degrees

AssociateBachelorDegree

Travel

TravelTravel 10%

Industry

AerospaceDefenseEducationEnergyInsurancePublic-sector

Company size

Smb